hokyeejaufoxmailcom • 2020-11-24 15:53:41

MULTICS: IBM mainframe systems. A pioneer of introducing segment to modern architecture.  It solved problems of external fragmentation and lengthy search times by paging segments. Every process can have multiple virtual address spaces/segments and each segment has its own page table.

The following figure is showing MULTICS virual address:

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Segment descr iptor table has one descr iptor for each segment.

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/descr ipter.png"><img class="alignnone size-medium wp-image-9012" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/descr ipter-300x296.png" alt="" width="300" height="296" /></a>

Each descr iptor points to a page table.

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/Page-table.png"><img class="alignnone size-medium wp-image-9013" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/Page-table-300x212.png" alt="" width="300" height="212" /></a>

Each process can have multiple segments, which map to one linear address space. And linear address space has one page table.

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/multics.png"><img class="alignnone size-medium wp-image-9014" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/multics-300x161.png" alt="" width="300" height="161" /></a>

&nbsp;

Advantages: each segment can have the full virtual adddress space allowed by number of address bits.

Disadvantages: Switching from one segment to another has a high content switch penalty, even within the same process. PostVer 0

804824950qqcom • 2020-11-24 15:57:33

Paging storage management

Actually stored in physical memory (on disk), read page by page during operation;

1. Basic idea

The address space of the user program is divided into a number of fixed-size areas called "pages". Correspondingly, the memory space is divided into a number of physical blocks, and the page and block sizes are equal. Any page of the user program can be placed in any block of the memory to achieve discrete allocation.

1) Divide the memory equally

Page storage management divides the memory space into several physical blocks of equal length, which become physical pages and physical blocks. The size of each physical block is generally an integer power of 2. All physical blocks of memory are numbered starting from 0 and are called physical page numbers.

2) Logical address

The system divides the logical space of the program into several pages according to the same size, which are called logical pages or pages. Each logical page of the program is numbered sequentially starting from 0, which is called logical page number or relative page number. The addressing starts from 0 in each page, which is called the page address. The logical address in the program consists of two parts: page number P and page displacement W.

Before executing a program, the preparation work required by the memory manager:

1) Determine the number of pages of the program

2) Leave enough free pages in main memory

3) Load all pages of the program into the main memory. (Static paging, pages do not need to be continuous)

2. Address organization for paging storage management




Page number x bit, each job is at most 2 x power page, the number of digits in the page displacement represents the size of the page, if the page displacement is y bit, then 2 to the y power, that is the size of the page, Address starts from 000000000000 to the y power of 2

If a given logical address is A and the page size is L, then

Page number P=INT[A/L], page address W=A MOD L

3. Memory allocation

Adjacent pages are not necessarily adjacent in memory, that is, the memory blocks allocated to the program are not necessarily continuous. The paging of the program address space is performed automatically by the system, that is, it is transparent to the user. Since the page size is an integer power of 2, the high part of the relative address is the page number, and the low part is the address in the page.

4. Page table

In the paging system, each page of the process is allowed to be stored discretely in any physical block of the memory. In order to find the physical block corresponding to each page in the memory, the system creates a page table for each process for Record the correspondence between the logical pages of the process and the physical pages of the memory. The function of the page table is to realize the address mapping from the page number to the physical block number. How many pages there are in the address space, and how many rows are registered in the page table, are arranged in the order of logical pages, like:



5. Address change (MMu)

The logical address of the page-based virtual storage system is composed of two parts: the page number and the address within the page. The address conversion process is shown in Figure 7-3. Assuming that the size of the page is 4K, the physical address a formed by the decimal logical address 8203 shown in Figure 7-3 after the address conversion should be decimal.


Page number: 8203/4096 = 2; page offset: 8203%4096= 11; physical address: physical block number * page size + page offset = 28683.

6. Address conversion mechanism with fast table

In the paging system, every time the CPU wants to access a piece of data, it must access the memory twice (access to the page table, access to the actual physical address). In order to improve the address conversion speed, a special high-speed buffer memory with parallel query capability is added, called "associative memory" or "fast table", to store the currently accessed page table entries.

7. Page sharing and protection

When the same page information is required in multiple different processes, only one copy can be kept in the main memory, as long as the respective items of these processes point to the same block number of the memory. At the same time, the corresponding "access authority" is set in the page table to perform various necessary restrictions on the access authority of different processes.

8. Page replacement:

When a process is running in physical memory and calls to a virtual page that is not in physical memory, MMU notices that the page is not mapped to physical memory, so the cpu falls into the operating system. This trap is called page fault interrupt. The operating system finds A page frame that is rarely used and writes its contents to disk backup. Then read the virtual page that needs to be accessed into the page frame just recycled, modify the mapping relationship, and then restart the instruction that caused the trap. PostVer 0

1720650158qqcom • 2020-11-24 17:24:25

MULTICS provides up to 218 segments (over 250,000) per program, with a virtual address space of up to 65,536 (36-bit) words. To achieve this, the designers of MULTICS decided to treat each segment as a virtual memory and page it, combining the benefits of paging (uniform page size and not having to bring it all into memory when only a portion of the segment is used) with the benefits of fragmentation (easy programming, modularity, protection, and sharing).

Each MULTICS program has a segment table, and each segment corresponds to a descr iptor. Because a segment table may have more than 250,000 entries, the segment table itself is also a segment and is paginated. A segment descr iptor contains a marker for whether a segment is in memory. As long as any part of a segment is in memory, the segment is considered to be in memory, and its page table is also in memory. If a segment is in memory, its descr iptor will contain an 18-bit pointer to its page table (see Figure 3-35a). Because the physical address is 24 bits and the page is aligned with a 64-byte boundary (implying that the lower 6 bits of the page address are 000000), only 18 bits are needed in the descr iptor to store the page table address. Segment descr iptors also contain segment sizes, guard bits, and other entries. Figure 3-35b shows an example of a MULTICS segment descr iptor. The address of the segment in the secondary memory is not in the segment descr iptor, but in another table used by the segment missing handler.

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d7-1.png"><img class="alignnone size-medium wp-image-9015" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d7-1-283x300.png" alt="" width="283" height="300" /></a>

Each segment is a normal virtual address space, paged in the same way as the nonsegmented paged storage discussed earlier in this chapter. The average page size is 1024 bytes (although some MULTICS USES segments that are not paging or paging in 64 bytes to save memory).

An address in MULTICS consists of two parts: a segment and an intra segment address. The intra - section address is further divided into page number and words within the page, as shown in Figure 3-36. When making a memory access, execute the following algorithm.

1) Find the segment descr iptor according to the segment number.

2) Check whether the page table of this paragraph is in memory. If yes, find its location; If not, a segment error is generated. An out-of-bounds error (trap) is issued if the access violates the protection requirements of the segment.

3) Check the page table entry of the requested virtual page. If the page is not in memory, a page missing interrupt will be generated. If it is in memory, the starting address of the page in memory will be extracted from the page table entry.

4) Add the offset to the starting address of the page to get the address of the word to be accessed in memory.

5) Finally, read or write.

For the sake of simplicity, we ignore the fact that the descr iptor segments themselves need to be paginated. The actual procedure is to find the page table of the descr iptor segment through a register (the descr iptor base address register), which points to the page of the descr iptor segment.

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-1.png"><img class="alignnone size-full wp-image-9016" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-1.png" alt="" width="263" height="208" /></a>

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-2.png"><img class="alignnone size-medium wp-image-9017" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-2-300x160.png" alt="" width="300" height="160" /></a> <a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-5.png"><img class="alignnone size-medium wp-image-9020" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-5-300x212.png" alt="" width="300" height="212" /></a> <a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-4.png"><img class="alignnone size-medium wp-image-9019" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-4-300x211.png" alt="" width="300" height="211" /></a> <a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-3.png"><img class="alignnone size-medium wp-image-9018" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/d8-3-300x149.png" alt="" width="300" height="149" /></a>

Advantages: Optimizes performance and reduces running time

Disadvantages: Architecture-dependent, application migration is no longer simple PostVer 0

1730854984qqcom • 2020-11-24 23:18:39

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/MULTICS.jpg"><img class="alignnone size-medium wp-image-9021" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/MULTICS-300x278.jpg" alt="" width="300" height="278" /></a> PostVer 0

653968106qqcom • 2020-11-25 10:54:12

2018329621008徐天然
If a segment is relatively large, it may be inconvenient or even impossible to keep the whole segment in memory. Therefore, the idea of pagination is generated. In this way, only those pages that really need to be called into memory.
MULTICS provides a maximum of 218 segments (more than 250000) per program, and the maximum virtual address space of each segment is 65536 (36 bit) words long. In order to implement it, the designers of multimedia decided to treat each segment as a virtual memory and paginate it to combine the advantages of paging (uniform page size and not having to put all of it into memory when only a part of the segment is used) and the benefits of segmentation (easy programming, modularization, protection, and sharing).
Each MULTICS program has a segment table, and each segment corresponds to a descr iptor. Because the segment table may have more than 250000 table entries, the segment table itself is a segment and is paginated. A segment descr iptor contains a flag of whether a segment is in memory. As long as any part of a segment is in memory, the segment is considered to be in memory, and its page table will also be in memory. If a segment is in memory, its descr iptor will contain an 18 Bit pointer to its page table. Because the physical address is 24 bits and the page is aligned on a 64 byte boundary (which implies that the lower six bits of the page address are 000000), only 18 bits are needed in the descr iptor to store the page table address. The segment descr iptor also contains segment size, guard bits, and other entries. Figure 3-35b an example of a multi segment descr iptor. The address of the segment in the auxiliary memory is not in the segment descr iptor, but in another table used by the missing segment handler.

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/130701454.jpg"><img class="alignnone size-medium wp-image-9024" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/130701454-242x300.jpg" alt="" width="242" height="300" /></a>

In MULTICS, an address consists of two parts: segment and intra segment address. The address in the segment is further divided into page number and word in page, as shown in Figure 3-36. In memory access, execute the following algorithm.
1) Find the segment descr iptor based on the segment number.
2) Check whether the page table of the segment is in memory. If it is, its location is found; if it is not, a segment error is generated. If the access violates the protection requirements of a segment, an out of bounds error (TRAP) is issued.
3) Check the page table entry of the requested virtual page. If the page is not in memory, a page missing interrupt will be generated. If the page is in memory, the starting address of the page in memory will be taken from the page table entry.
4) Add the offset to the starting address of the page to get the address of the word to be accessed in memory.
5) Finally, read or write.
This process is shown below. For simplicity, we ignore the fact that descr iptor segments themselves need to be paged. The actual process is to find the page table of the descr iptor segment through a register (descr iptor base register), which points to the page of the descr iptor segment. Once the descr iptor of the desired segment is found, the addressing process is shown in figure below：

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/130757168.jpg"><img class="alignnone size-medium wp-image-9025" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/130757168-300x266.jpg" alt="" width="300" height="266" /></a>

If the above algorithm is run by the operating system for each instruction, the program will run slowly. In fact, the MULTICS hardware contains a 16 word high-speed TLB, which can search all table entries in parallel for a given keyword, as shown in the figure below. When an address is sent to the computer, the addressing hardware first checks whether the virtual address is in the TLB. If yes, the page frame number is directly obtained from the TLB and the actual address of the word to be accessed is generated, instead of searching in the descr iptor segment or page table.

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The address of 16 recently visited pages is stored in TLB. The program whose working set is less than the capacity of TLB will gradually become stable and start to run efficiently with the address of the whole working set loaded into TLB. If the page is not in the TLB, the descr iptor and page table are accessed to find the page frame number, and the TLB is updated to include the page. The least recently used page is eliminated from the TLB. The lifetime bits track which table entries are least recently used. TLB is used to compare segment and page numbers of all table entries in parallel. PostVer 0

997371991qqcom • 2020-11-26 11:44:39

2018329621069 张时敏

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/图片1.png"><img class="alignnone size-medium wp-image-9038" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/图片1-300x144.png" alt="" width="300" height="144" /></a>

Paragraph page type, paging in paragraphs. In the past, paging was a page table per process, and now this segmentation is a page table per segment.

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/图片2.png"><img class="alignnone size-medium wp-image-9039" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/图片2-300x159.png" alt="" width="300" height="159" /></a>

The structure of the descr iptor descr iptor of the segment is shown on the right. The 18-bit Main memory address of the page table is used to indicate the address of the page table of this segment in the memory; the 9-bit Segment length indicates the segment The length of, in units of pages, is how many pages there are in this segment; Page size of 1 bit indicates the size of the page, 1024 or 64 words; there is also a bit indicating whether the segment starts paging, if it is not started Pure segmentation, it is segment page type when activated.

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/图片3.png"><img class="alignnone size-medium wp-image-9040" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/11/图片3-300x206.png" alt="" width="300" height="206" /></a>

The above figure is a 34-bit virtual address. Look up the table according to the 18-bit segment number (the leftmost table in the above figure above), find the page table of the segment, and according to the next 6-bit page number , Find the location of the specific physical page (page frame) in the page table, and finally find the real physical address according to the offset within the page of 10 bits.

To speed up the search, TLB is also introduced.

&nbsp; PostVer 0

1210775967qqcom • 2020-11-29 21:26:21

MULTICS, whose full name is multiplex information and computing system, was jointly developed by Bell Labs, MIT and General Electric Company in 1964. It is a multi person and multi task operating system installed on a mainframe.
Based on compatible time sharing system (CTSS), MULTICS is built in ge-645, a mainframe of general electric power company. The aim is to connect 1000 terminals and support 300 users to go online at the same time. In 1969, Bell Labs withdrew from the program because of the slow progress of its work and its eventual abolition. At the time, Ken Thompson was writing a game program called space travel. After the MULTICS project stopped, two software engineers of Bell Labs, Ken Thompson and Dennis Ritchie, developed UNIX based on C language.
October 2009 marks an important milestone in the history of computing. It was 40 years ago that the first MULTICS computer system was used for information management at MIT. MULTICS (multiplex information and computing service) is considered as the foundation of modern operating system. MULTICS is a catalyst to accelerate the development of UNIX. Since it was released 40 years ago, it has become a model for modern operating system design.

<strong>Characteristic：</strong>
1： For the first time, the structured programming method is successfully used in the development of large-scale software, which greatly shortens the development cycle and improves the reliability of software greatly.
2： Successful adoption of existing software as a mature tool. A large part of programs in multimedia are written with CTSS, which is a successful attempt in software inheritance.
3： All the system programs are written in high-level language PL / I, which makes the system program function independent of the machine, greatly improves the portability of the system, and makes it easier to popularize. PostVer 0

454234624qqcom • 2020-11-30 20:01:57

<strong>Multics</strong> is a comprehensive, general-purpose programming system that is being developed as a research project. The original Multics system is based on GE 645 computers. One of the overall design goals is to create a computing system that can meet almost all major requirements. These systems must run continuously and be reliable, similar to telephones or power systems 7 days a week , Work 24 hours a day, and must be able to meet a wide range of service needs. From the absence of multiple human-computer interaction users, the sequential processing from the use of the system and the dedicated system’s own programming language and subsystems, and the centralized batch of cards, tapes, and printer facilities located in remote terminals work, such information processing and communication systems are considered essential Indispensable, the use of computers in the future business growth, in the industry, in the government and scientific laboratories, and stimulus, otherwise the application will be withdrawn.Multics is a very influential early time-sharing operating system, and introduced a large number of new concepts, including dynamic linking and hierarchical file system, which is very powerful, UNIX can actually be considered as the successor to "simplification" .

<strong>characteristic:</strong>

1. For the first time, the structured programming method was successfully adopted in the development of large-scale software, which greatly shortened the development cycle and greatly improved the reliability of the software.

2. Successfully adopt existing mature software as tools. A large part of the program in MULTICS is written by itself, namely CTSS, which is a successful attempt in the inheritance of the software.

3. All system programs are written in high-level language PL/I, which makes the system programs functionally independent of the machine, greatly improves the portability of the system, and makes it easier to popularize. PostVer 0

2470994471qqcom • 2020-12-01 12:54:26

MULTICS:

The MULTICS operating system was designed from 1965 to 1970 at MIT as a
natural extension of CTSS. CTSS and other early time-sharing systems were so
successful that they created an immediate desire to proceed quickly to bigger
and better systems. As larger computers became available, the designers of
CTSS set out to create a time-sharing utility. Computing service would be
provided like electrical power. Large computer systems would be connected
by telephone wires to terminals in offices and homes throughout a city. The
operating system would be a time-shared system running continuously with a
vast file system of shared programs and data.
MULTICS was designed by a team from MIT, GE (which later sold its computer
department to Honeywell), and Bell Laboratories (which dropped out of
the project in 1969). The basic GE 635 computer was modified to a new computer
system called the GE 645, mainly by the addition of paged-segmentation
memory hardware.
In MULTICS, a virtual address was composed of an 18-bit segment number
and a 16-bit word offset. The segments were then paged in 1-KB-word pages.
The second-chance page-replacement algorithm was used.
The segmented virtual address space was merged into the file system; each
segment was a file. Segments were addressed by the name of the file. The file
system itself was a multilevel tree structure, allowing users to create their own
subdirectory structures.
Like CTSS, MULTICS used a multilevel feedback queue for CPU scheduling.
Protection was accomplished through an access list associated with each file
and a set of protection rings for executing processes. The system, which was
written almost entirely in PL/1, comprised about 300,000 lines of code. It was
extended to a multiprocessor system, allowing a CPU to be taken out of service
for maintenance while the system continued running. PostVer 0

cfeshete97gmailcom • 2020-12-02 23:08:56

<strong><b>Multics</b></strong> ("<strong><b>Multiplexed Information and Computing Service</b></strong>") was an influential early <a href="https://en.wikipedia.org/wiki/Time-sharing">time-sharing</a> <a href="https://en.wikipedia.org/wiki/Operating_system">operating system</a> based on the concept of a <a href="https://en.wikipedia.org/wiki/Single-level_store">single-level memory</a>. Multics "has influenced all modern operating systems since, from microcomputers to mainframes."

Initial planning and development for Multics started in 1964, in <a href="https://en.wikipedia.org/wiki/Cambridge,_Massachusetts">Cambridge, Massachusetts</a>. Originally it was a cooperative project led by <a href="https://en.wikipedia.org/wiki/Massachusetts_Institute_of_Technology">MIT</a> (<a href="https://en.wikipedia.org/wiki/Project_MAC">Project MAC</a> with <a href="https://en.wikipedia.org/wiki/Fernando_Corbat%C3%B3">Fernando Corbató</a>) along with <a href="https://en.wikipedia.org/wiki/General_Electric">General Electric</a> and <a href="https://en.wikipedia.org/wiki/Bell_Labs">Bell Labs</a>. It was developed on the <a href="https://en.wikipedia.org/wiki/GE_645">GE 645</a> computer, which was specially designed for it; the first one was delivered to MIT in January, 1967.

Multics was conceived as a commercial product for General Electric, and became one for <a href="https://en.wikipedia.org/wiki/Honeywell">Honeywell</a>, albeit not very successfully. Due to its many novel and valuable ideas, Multics had a significant impact on computer science despite its faults.

Multics had numerous features intended to ensure high availability so that it would support a <a href="https://en.wikipedia.org/wiki/Computing_utility">computing utility</a> similar to the <a href="https://en.wikipedia.org/wiki/Telephone">telephone</a> and <a href="https://en.wikipedia.org/wiki/Electricity">electricity</a> <a href="https://en.wikipedia.org/wiki/Public_utility">utilities</a>. Modular hardware structure and software architecture were used to achieve this. The system could grow in size by simply adding more of the appropriate resource, be it computing power, main memory, or disk storage. Separate <a href="https://en.wikipedia.org/wiki/Access_control_list">access control lists</a> on every file provided flexible information sharing, but complete privacy when needed. Multics had a number of standard mechanisms to allow engineers to analyze the performance of the system, as well as a number of adaptive performance optimization mechanisms.

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/12/1.jpg"><img class="alignnone size-medium wp-image-9067" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/12/1-300x124.jpg" alt="" width="300" height="124" /></a>

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/12/2.jpg"><img class="alignnone size-medium wp-image-9068" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/12/2-300x238.jpg" alt="" width="300" height="238" /></a> PostVer 0

wx287_oz26ft1wt2_isbggtha4lgepaasa • 2020-12-08 14:05:29

Multics is a comprehensive, general-purpose programming system that is being developed as a research project. The original Multics system is based on GE 645 computers. One of the overall design goals is to create a computing system that can meet almost all major requirements. These systems must run continuously and be reliable, similar to telephones or power systems 7 days a week , Work 24 hours a day, and must be able to meet a wide range of service needs. From the absence of multiple human-computer interaction users, the sequential processing from the use of the system and the dedicated system’s own programming language and subsystems, and the centralized batch of cards, tapes, and printer facilities located in remote terminals work, such information processing and communication systems are considered essential Indispensable, the use of computers in the future business growth, in the industry, in the government and scientific laboratories, and stimulus, otherwise the application will be withdrawn.Multics is a very influential early time-sharing operating system, and introduced a large number of new concepts, including dynamic linking and hierarchical file system, which is very powerful, UNIX can actually be considered as the successor to "simplification" . characteristic: 1. For the first time, the structured programming method was successfully adopted in the development of large-scale software, which greatly shortened the development cycle and greatly improved the reliability of the software. 2. Successfully adopt existing mature software as tools. A large part of the program in MULTICS is written by itself, namely CTSS, which is a successful attempt in the inheritance of the software. 3. All system programs are written in high-level language PL/I, which makes the system programs functionally independent of the machine, greatly improves the portability of the system, and makes it easier to popularize. PostVer 0

512858048qqcom • 2020-12-11 15:14:10

MULTICS is a storage organization method that combines segmentation and paging, which can make full use of the advantages of segmentation and page management.

(1) Use segmentation method to allocate and manage virtual storage. The address space of the program is divided into basically independent sections according to logical units, and each section has its own section name, and then each section is divided into pages of fixed size.

(2) Use the paging method to allocate and manage the actual memory. That is, the entire main memory is divided into memory blocks equal to the above-mentioned page size, which can be loaded into any page of the job. The transfer of the program to or from the memory is carried out on a page-by-page basis. But it can be shared and protected by segment.

&nbsp;

The MULTICS system solved problems of external fragmentation and lengthy search times by paging the segments
Solution differs from pure segmentation in that the segment-table entry contains not the base address of the segment, but rather the base address of a page table for this segment

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1285795916qqcom • 2020-12-12 15:33:44

邱锐鹏 2018329621199

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/12/discussion8.png"><img class="alignnone size-medium wp-image-9131" src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/12/discussion8-259x300.png" alt="" width="259" height="300" /></a>

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1079513613qqcom • 2020-12-15 13:38:39

Paging storage management Actually stored in physical memory (on disk), read page by page during operation; 1. Basic idea The address space of the user program is divided into a number of fixed-size areas called "pages". Correspondingly, the memory space is divided into a number of physical blocks, and the page and block sizes are equal. Any page of the user program can be placed in any block of the memory to achieve discrete allocation. 1) Divide the memory equally Page storage management divides the memory space into several physical blocks of equal length, which become physical pages and physical blocks. The size of each physical block is generally an integer power of 2. All physical blocks of memory are numbered starting from 0 and are called physical page numbers. 2) Logical address The system divides the logical space of the program into several pages according to the same size, which are called logical pages or pages. Each logical page of the program is numbered sequentially starting from 0, which is called logical page number or relative page number. The addressing starts from 0 in each page, which is called the page address. The logical address in the program consists of two parts: page number P and page displacement W. Before executing a program, the preparation work required by the memory manager: 1) Determine the number of pages of the program 2) Leave enough free pages in main memory 3) Load all pages of the program into the main memory. (Static paging, pages do not need to be continuous) 2. Address organization for paging storage management Page number x bit, each job is at most 2 x power page, the number of digits in the page displacement represents the size of the page, if the page displacement is y bit, then 2 to the y power, that is the size of the page, Address starts from 000000000000 to the y power of 2 If a given logical address is A and the page size is L, then Page number P=INT[A/L], page address W=A MOD L 3. Memory allocation Adjacent pages are not necessarily adjacent in memory, that is, the memory blocks allocated to the program are not necessarily continuous. The paging of the program address space is performed automatically by the system, that is, it is transparent to the user. Since the page size is an integer power of 2, the high part of the relative address is the page number, and the low part is the address in the page. 4. Page table In the paging system, each page of the process is allowed to be stored discretely in any physical block of the memory. In order to find the physical block corresponding to each page in the memory, the system creates a page table for each process for Record the correspondence between the logical pages of the process and the physical pages of the memory. The function of the page table is to realize the address mapping from the page number to the physical block number. How many pages there are in the address space, and how many rows are registered in the page table, are arranged in the order of logical pages, like: 5. Address change (MMu) The logical address of the page-based virtual storage system is composed of two parts: the page number and the address within the page. The address conversion process is shown in Figure 7-3. Assuming that the size of the page is 4K, the physical address a formed by the decimal logical address 8203 shown in Figure 7-3 after the address conversion should be decimal. Page number: 8203/4096 = 2; page offset: 8203%4096= 11; physical address: physical block number * page size + page offset = 28683. 6. Address conversion mechanism with fast table In the paging system, every time the CPU wants to access a piece of data, it must access the memory twice (access to the page table, access to the actual physical address). In order to improve the address conversion speed, a special high-speed buffer memory with parallel query capability is added, called "associative memory" or "fast table", to store the currently accessed page table entries. 7. Page sharing and protection When the same page information is required in multiple different processes, only one copy can be kept in the main memory, as long as the respective items of these processes point to the same block number of the memory. At the same time, the corresponding "access authority" is set in the page table to perform various necessary restrictions on the access authority of different processes. 8. Page replacement: When a process is running in physical memory and calls to a virtual page that is not in physical memory, MMU notices that the page is not mapped to physical memory, so the cpu falls into the operating system. This trap is called page fault interrupt. The operating system finds A page frame that is rarely used and writes its contents to disk backup. Then read the virtual page that needs to be accessed into the page frame just recycled, modify the mapping relationship, and then restart the instruction that caused the trap. PostVer 0

1403861656qqcom • 2020-12-20 10:56:02

So far, most of our examples have focused on systems with only a few parts (i.e., code, stack, heap); We can think of this segmentation as coarse-grained, because it splits the address space into relatively large chunks. However, some earlier systems (for example, Multics [CV65,DD68]) were more flexible, allowing the address space to be composed of a large number of small segments, known as fine-grained segmentation.

Support for many segments requires further hardware support, with segment tables stored in memory. Such a segment table usually supports the creation of a large number of segments, enabling the system to use segments in a more flexible way than what we are currently discussing. For example, early machines such as Burroughs B5000 had supported thousands of fragments and expected a compiler to split code and data into separate parts, while the operating system and hardware would support [RK68]. The idea was that by using fine-grained parts, the operating system could bet. PostVer 0

450766287qqcom • 2020-12-22 14:08:28

<a href="http://www.yvsou.com/wp-content/uploads/sites/30/2020/12/os8.png"><img src="http://www.yvsou.com/wp-content/uploads/sites/30/2020/12/os8-300x181.png" alt="" width="300" height="181" class="alignnone size-medium wp-image-9196" /></a> PostVer 0

shatino94163com • 2020-12-22 14:32:33

Paging storage management Actually stored in physical memory (on disk), read page by page during operation; 1. Basic idea The address space of the user program is divided into a number of fixed-size areas called "pages". Correspondingly, the memory space is divided into a number of physical blocks, and the page and block sizes are equal. Any page of the user program can be placed in any block of the memory to achieve discrete allocation. 1) Divide the memory equally Page storage management divides the memory space into several physical blocks of equal length, which become physical pages and physical blocks. The size of each physical block is generally an integer power of 2. All physical blocks of memory are numbered starting from 0 and are called physical page numbers. 2) Logical address The system divides the logical space of the program into several pages according to the same size, which are called logical pages or pages. Each logical page of the program is numbered sequentially starting from 0, which is called logical page number or relative page number. The addressing starts from 0 in each page, which is called the page address. The logical address in the program consists of two parts: page number P and page displacement W. Before executing a program, the preparation work required by the memory manager: 1) Determine the number of pages of the program 2) Leave enough free pages in main memory 3) Load all pages of the program into the main memory. (Static paging, pages do not need to be continuous) 2. Address organization for paging storage management Page number x bit, each job is at most 2 x power page, the number of digits in the page displacement represents the size of the page, if the page displacement is y bit, then 2 to the y power, that is the size of the page, Address starts from 000000000000 to the y power of 2 If a given logical address is A and the page size is L, then Page number P=INT[A/L], page address W=A MOD L 3. Memory allocation Adjacent pages are not necessarily adjacent in memory, that is, the memory blocks allocated to the program are not necessarily continuous. The paging of the program address space is performed automatically by the system, that is, it is transparent to the user. Since the page size is an integer power of 2, the high part of the relative address is the page number, and the low part is the address in the page. 4. Page table In the paging system, each page of the process is allowed to be stored discretely in any physical block of the memory. In order to find the physical block corresponding to each page in the memory, the system creates a page table for each process for Record the correspondence between the logical pages of the process and the physical pages of the memory. The function of the page table is to realize the address mapping from the page number to the physical block number. How many pages there are in the address space, and how many rows are registered in the page table, are arranged in the order of logical pages, like: 5. Address change (MMu) The logical address of the page-based virtual storage system is composed of two parts: the page number and the address within the page. The address conversion process is shown in Figure 7-3. Assuming that the size of the page is 4K, the physical address a formed by the decimal logical address 8203 shown in Figure 7-3 after the address conversion should be decimal. Page number: 8203/4096 = 2; page offset: 8203%4096= 11; physical address: physical block number * page size + page offset = 28683. 6. Address conversion mechanism with fast table In the paging system, every time the CPU wants to access a piece of data, it must access the memory twice (access to the page table, access to the actual physical address). In order to improve the address conversion speed, a special high-speed buffer memory with parallel query capability is added, called "associative memory" or "fast table", to store the currently accessed page table entries. 7. Page sharing and protection When the same page information is required in multiple different processes, only one copy can be kept in the main memory, as long as the respective items of these processes point to the same block number of the memory. At the same time, the corresponding "access authority" is set in the page table to perform various necessary restrictions on the access authority of different processes. 8. Page replacement: When a process is running in physical memory and calls to a virtual page that is not in physical memory, MMU notices that the page is not mapped to physical memory, so the cpu falls into the operating system. This trap is called page fault interrupt. The operating system finds A page frame that is rarely used and writes its contents to disk backup. Then read the virtual page that needs to be accessed into the page frame just recycled, modify the mapping relationship, and then restart the instruction that caused the trap.

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1224532347qqcom • 2021-01-01 14:36:13

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<p class="ordinary-output target-output clearfix">1. Basic idea</p>
<p class="ordinary-output target-output clearfix">The address space of user program is divided into several fixed size areas, called "pages". Accordingly, the memory space is divided into several physical blocks, and the size of pages and blocks are equal. Any page of the user program can be placed in any block of memory to achieve discrete allocation.</p>
<p class="ordinary-output target-output clearfix">1) Divide memory equally</p>
<p class="ordinary-output target-output clearfix">Page storage management divides the memory space into several physical blocks of equal length, which become both physical pages and physical blocks. The size of each physical block is generally taken as an integer power of 2.<span class=""> All physical blocks of memory are numbered from 0, which is called physical page number.</span></p>
<p class="ordinary-output target-output clearfix">2) Logical address</p>
<p class="ordinary-output target-output clearfix"><span class="">The system divides the logical space of the program into several pages according to the same size, which is called logical page, also called page.</span><span class=""> Each logical page of the program is numbered from 0, which is called logical page number or relative page number.</span><span class=""> Address from 0 in each page is called in page address.</span><span class=""> The logical address in the program consists of two parts: page number P and displacement W.</span></p>
<p class="ordinary-output target-output clearfix"><span class="">Before executing a program, the memory manager needs to prepare:</span></p>
<p class="ordinary-output target-output clearfix">1) Determine the number of pages in the program</p>
<p class="ordinary-output target-output clearfix">2) Leave enough free pages in main memory</p>
<p class="ordinary-output target-output clearfix">3) Load all pages of the program into main memory.<span class=""> (static, no paging required)</span></p>

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1079513613qqcom • 2021-01-04 14:22:30

Paging storage management Actually stored in physical memory (on disk), read page by page during operation; 1. Basic idea The address space of the user program is divided into a number of fixed-size areas called "pages". Correspondingly, the memory space is divided into a number of physical blocks, and the page and block sizes are equal. Any page of the user program can be placed in any block of the memory to achieve discrete allocation. 1) Divide the memory equally Page storage management divides the memory space into several physical blocks of equal length, which become physical pages and physical blocks. The size of each physical block is generally an integer power of 2. All physical blocks of memory are numbered starting from 0 and are called physical page numbers. 2) Logical address The system divides the logical space of the program into several pages according to the same size, which are called logical pages or pages. Each logical page of the program is numbered sequentially starting from 0, which is called logical page number or relative page number. The addressing starts from 0 in each page, which is called the page address. The logical address in the program consists of two parts: page number P and page displacement W. Before executing a program, the preparation work required by the memory manager: 1) Determine the number of pages of the program 2) Leave enough free pages in main memory 3) Load all pages of the program into the main memory. (Static paging, pages do not need to be continuous) 2. Address organization for paging storage management Page number x bit, each job is at most 2 x power page, the number of digits in the page displacement represents the size of the page, if the page displacement is y bit, then 2 to the y power, that is the size of the page, Address starts from 000000000000 to the y power of 2 If a given logical address is A and the page size is L, then Page number P=INT[A/L], page address W=A MOD L 3. Memory allocation Adjacent pages are not necessarily adjacent in memory, that is, the memory blocks allocated to the program are not necessarily continuous. The paging of the program address space is performed automatically by the system, that is, it is transparent to the user. Since the page size is an integer power of 2, the high part of the relative address is the page number, and the low part is the address in the page. 4. Page table In the paging system, each page of the process is allowed to be stored discretely in any physical block of the memory. In order to find the physical block corresponding to each page in the memory, the system creates a page table for each process for Record the correspondence between the logical pages of the process and the physical pages of the memory. The function of the page table is to realize the address mapping from the page number to the physical block number. How many pages there are in the address space, and how many rows are registered in the page table, are arranged in the order of logical pages, like: 5. Address change (MMu) The logical address of the page-based virtual storage system is composed of two parts: the page number and the address within the page. The address conversion process is shown in Figure 7-3. Assuming that the size of the page is 4K, the physical address a formed by the decimal logical address 8203 shown in Figure 7-3 after the address conversion should be decimal. Page number: 8203/4096 = 2; page offset: 8203%4096= 11; physical address: physical block number * page size + page offset = 28683. 6. Address conversion mechanism with fast table In the paging system, every time the CPU wants to access a piece of data, it must access the memory twice (access to the page table, access to the actual physical address). In order to improve the address conversion speed, a special high-speed buffer memory with parallel query capability is added, called "associative memory" or "fast table", to store the currently accessed page table entries. 7. Page sharing and protection When the same page information is required in multiple different processes, only one copy can be kept in the main memory, as long as the respective items of these processes point to the same block number of the memory. At the same time, the corresponding "access authority" is set in the page table to perform various necessary restrictions on the access authority of different processes. 8. Page replacement: When a process is running in physical memory and calls to a virtual page that is not in physical memory, MMU notices that the page is not mapped to physical memory, so the cpu falls into the operating system. This trap is called page fault interrupt. The operating system finds A page frame that is rarely used and writes its contents to disk backup. Then read the virtual page that needs to be accessed into the page frame just recycled, modify the mapping relationship, and then restart the instruction that caused the trap. PostVer 0

1119833189qqcom • 2021-01-05 00:25:19

There are many similarities between paging and staging systems, but conceptually they are completely different, mainly as follows:
1, page is the physical unit of information, paging is to achieve discrete allocation, in order to reduce the amount of memory, improve the utilization of memory; In other words, paging is simply due to system administration needs, not user needs.
A segment is a logical unit of information that contains a set of information whose meaning is relatively complete. The purpose of segmentation is to better meet the needs of users.
2. The size of the page is fixed and determined by the system. The logical address is divided into page number and page address, which is implemented by the machine hardware, so a system can only have a page of one size.
The length of the segment is not fixed, depending on the program written by the user, usually by the editor program when editing the source program, according to the nature of the information to be divided.
3.paging job address space is dimensional one, that is, a single linear space, the programmer only use a memory, can represent an address.
The segmented job address space is two-dimensional. When the programmer identifies an address, he needs to give both the segment name and the segment address. PostVer 0

chipusilesgmailcom • 2021-01-06 15:21:06

<h2>Paging</h2>
With a system where the total size is less than the core space of the system, the "swapping" of complete segments into and out of core would be feasible. Even in such a system, if all segments did not have the same maximum size, or had the same maximum size but were allowed to grow from initially smaller sizes, there remains the difficult core management problem of providing space for segments of different sizes. Multics, however, provides for segments of sufficient maximum size so that only a few can be entirely core-resident at any one time. Also, these segments can grow from any initial size smaller than the maximum permissible size.

By breaking segments into equal-size parts called pages and providing for the transportation of individual pages to and from core as demand dictates, the disadvantages of fragmentation are incurred, as explained by Denning [9]. However, several practical problems encountered in the implementation of a segmented virtual memory are solved.

First, since pages are all of equal size, space allocation is immensely simplified. The problems of "compacting" information in core and on secondary storage, characteristic of systems dealing with variable-sized segments or pages, are thereby eliminated.

Second, since only the referenced page of a segment need be in core at any one instant, segments need not be small compared to core memory.

Third, "demand paging" permits advantage to be taken of any locality of reference peculiar to a program by transporting to core only those pages of segments which are currently needed. Any additional overhead associated with demand paging should of course be weighed against the alternative inefficiencies associated with dedicating core to entire segments which must be swapped into core but which may be only partly referenced.

Finally, demand paging allows the user a greater degree of machine independence in that a large program designed to run well in a large core memory configuration will continue to run at reduced performance on smaller configurations.
<h2>4. The Multics Virtual Memory</h2>
Multics simulates the idealized memory, represented in Figure 1, using the segmentation and paging features of the 645 assisted by the appropriate software features. The result of the simulation is referred to as the "Multics Virtual Memory." The user can keep a large number of segments in this memory and reference them by symbolic name; upon first reference to a segment, the supervisor automatically transforms the symbolic name into the appropriate hardware address which is directly used by the processor for subsequent references.

The remainder of this paper explains the addressing mechanism in the 645 and describes how the Multics supervisor simulates the Multics idealized memory. PostVer 0

2736689890qqcom • 2021-01-06 21:03:23

2018329621239-严宇豪

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Segmented Paging
Pure segmentation is not very popular and not being used in many of the operating systems. However, Segmentation can be combined with Paging to get the best features out of both the techniques.

In Segmented Paging, the main memory is divided into variable size segments which are further divided into fixed size pages.

Pages are smaller than segments.
Each Segment has a page table which means every program has multiple page tables.
The logical address is represented as Segment Number (base address), Page number and page offset.
Segment Number → It points to the appropriate Segment Number.

Page Number → It Points to the exact page within the segment

Page Offset → Used as an offset within the page frame

Each Page table contains the various information about every page of the segment. The Segment Table contains the information about every segment. Each segment table entry points to a page table entry and every page table entry is mapped to one of the page within a segment. PostVer 0

439731491qqcom • 2021-01-07 21:37:00

<p style="text-align: center;"> <a href="http://www.yvsou.com/wp-content/uploads/sites/30/2021/01/捕获-4.png"><img class="alignnone size-medium wp-image-9326" src="http://www.yvsou.com/wp-content/uploads/sites/30/2021/01/捕获-4-300x204.png" alt="" width="300" height="204" /></a></p>
<p style="text-align: center;"><img class="alignnone size-medium wp-image-9325" src="http://www.yvsou.com/wp-content/uploads/sites/30/2021/01/02-1-300x186.png" alt="" width="300" height="186" /></p> PostVer 0

962305148qqcom • 2021-01-07 22:21:31

<h2><strong>2018329621064_邢杰焰</strong></h2>
MULTICS: The MULTICS operating system was designed from 1965 to 1970 at MIT as a natural extension of CTSS. CTSS and other early time-sharing systems were so successful that they created an immediate desire to proceed quickly to bigger and better systems. As larger computers became available, the designers of CTSS set out to create a time-sharing utility. Computing service would be provided like electrical power. Large computer systems would be connected by telephone wires to terminals in offices and homes throughout a city. The operating system would be a time-shared system running continuously with a vast file system of shared programs and data. MULTICS was designed by a team from MIT, GE (which later sold its computer department to Honeywell), and Bell Laboratories (which dropped out of the project in 1969). The basic GE 635 computer was modified to a new computer system called the GE 645, mainly by the addition of paged-segmentation memory hardware. In MULTICS, a virtual address was composed of an 18-bit segment number and a 16-bit word offset. The segments were then paged in 1-KB-word pages. The second-chance page-replacement algorithm was used. The segmented virtual address space was merged into the file system; each segment was a file. Segments were addressed by the name of the file. The file system itself was a multilevel tree structure, allowing users to create their own subdirectory structures. Like CTSS, MULTICS used a multilevel feedback queue for CPU scheduling. Protection was accomplished through an access list associated with each file and a set of protection rings for executing processes. The system, which was written almost entirely in PL/1, comprised about 300,000 lines of code. It was extended to a multiprocessor system, allowing a CPU to be taken out of service for maintenance while the system continued running. PostVer 0